Fossil SCM
Fixed module/divide by 0 in TH1, per bug report from Eduardo Morras.
Commit
fded1d055f57430120e87df96e021c39d80a15ce
Parent
39feb8926e6c617…
1 file changed
+14
-2
M
src/th.c
+14
-2
| --- src/th.c | ||
| +++ src/th.c | ||
| @@ -1874,12 +1874,24 @@ | ||
| 1874 | 1874 | |
| 1875 | 1875 | if( rc==TH_OK && eArgType==ARG_INTEGER ){ |
| 1876 | 1876 | int iRes = 0; |
| 1877 | 1877 | switch( pExpr->pOp->eOp ) { |
| 1878 | 1878 | case OP_MULTIPLY: iRes = iLeft*iRight; break; |
| 1879 | - case OP_DIVIDE: iRes = iLeft/iRight; break; | |
| 1880 | - case OP_MODULUS: iRes = iLeft%iRight; break; | |
| 1879 | + case OP_DIVIDE: | |
| 1880 | + if(!iRight){ | |
| 1881 | + Th_ErrorMessage(interp, "Divide by 0:", zLeft, nLeft); | |
| 1882 | + return TH_ERROR; | |
| 1883 | + } | |
| 1884 | + iRes = iLeft/iRight; | |
| 1885 | + break; | |
| 1886 | + case OP_MODULUS: | |
| 1887 | + if(!iRight){ | |
| 1888 | + Th_ErrorMessage(interp, "Modulo by 0:", zLeft, nLeft); | |
| 1889 | + return TH_ERROR; | |
| 1890 | + } | |
| 1891 | + iRes = iLeft%iRight; | |
| 1892 | + break; | |
| 1881 | 1893 | case OP_ADD: iRes = iLeft+iRight; break; |
| 1882 | 1894 | case OP_SUBTRACT: iRes = iLeft-iRight; break; |
| 1883 | 1895 | case OP_LEFTSHIFT: iRes = iLeft<<iRight; break; |
| 1884 | 1896 | case OP_RIGHTSHIFT: iRes = iLeft>>iRight; break; |
| 1885 | 1897 | case OP_LT: iRes = iLeft<iRight; break; |
| 1886 | 1898 |
| --- src/th.c | |
| +++ src/th.c | |
| @@ -1874,12 +1874,24 @@ | |
| 1874 | |
| 1875 | if( rc==TH_OK && eArgType==ARG_INTEGER ){ |
| 1876 | int iRes = 0; |
| 1877 | switch( pExpr->pOp->eOp ) { |
| 1878 | case OP_MULTIPLY: iRes = iLeft*iRight; break; |
| 1879 | case OP_DIVIDE: iRes = iLeft/iRight; break; |
| 1880 | case OP_MODULUS: iRes = iLeft%iRight; break; |
| 1881 | case OP_ADD: iRes = iLeft+iRight; break; |
| 1882 | case OP_SUBTRACT: iRes = iLeft-iRight; break; |
| 1883 | case OP_LEFTSHIFT: iRes = iLeft<<iRight; break; |
| 1884 | case OP_RIGHTSHIFT: iRes = iLeft>>iRight; break; |
| 1885 | case OP_LT: iRes = iLeft<iRight; break; |
| 1886 |
| --- src/th.c | |
| +++ src/th.c | |
| @@ -1874,12 +1874,24 @@ | |
| 1874 | |
| 1875 | if( rc==TH_OK && eArgType==ARG_INTEGER ){ |
| 1876 | int iRes = 0; |
| 1877 | switch( pExpr->pOp->eOp ) { |
| 1878 | case OP_MULTIPLY: iRes = iLeft*iRight; break; |
| 1879 | case OP_DIVIDE: |
| 1880 | if(!iRight){ |
| 1881 | Th_ErrorMessage(interp, "Divide by 0:", zLeft, nLeft); |
| 1882 | return TH_ERROR; |
| 1883 | } |
| 1884 | iRes = iLeft/iRight; |
| 1885 | break; |
| 1886 | case OP_MODULUS: |
| 1887 | if(!iRight){ |
| 1888 | Th_ErrorMessage(interp, "Modulo by 0:", zLeft, nLeft); |
| 1889 | return TH_ERROR; |
| 1890 | } |
| 1891 | iRes = iLeft%iRight; |
| 1892 | break; |
| 1893 | case OP_ADD: iRes = iLeft+iRight; break; |
| 1894 | case OP_SUBTRACT: iRes = iLeft-iRight; break; |
| 1895 | case OP_LEFTSHIFT: iRes = iLeft<<iRight; break; |
| 1896 | case OP_RIGHTSHIFT: iRes = iLeft>>iRight; break; |
| 1897 | case OP_LT: iRes = iLeft<iRight; break; |
| 1898 |